MAX11610EEE+T【PDF 5/22 页】IC ADC SERIAL 10BIT 12CH 16-QSOP

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MAX11606–MAX11611

Low-Power, 4-/8-/12-Channel, I2C,

10-Bit ADCs in Ultra-Small Packages

Maxim Integrated

Configuration/Setup Bytes (Write Cycle)

A write cycle begins with the bus master issuing a

START condition followed by seven address bits (Figure

7) and a write bit (R/W = 0). If the address byte is suc-

cessfully received, the MAX11606–MAX11611 (slave)

issues an acknowledge. The master then writes to the

slave. The slave recognizes the received byte as the

setup byte (Table 1) if the most significant bit (MSB) is

1. If the MSB is 0, the slave recognizes that byte as the

configuration byte (Table 2). The master can write either

one or two bytes to the slave in any order (setup byte

then configuration byte; configuration byte then setup

byte; setup byte or configuration byte only; Figure 9). If

the slave receives a byte successfully, it issues an

acknowledge. The master ends the write cycle by issu-

ing a STOP condition or a repeated START condition.

When operating in HS mode, a STOP condition returns

the bus into F/S mode (see the

HS Mode section).

B. TWO-BYTE WRITE CYCLE

SLAVE TO MASTER

MASTER TO SLAVE

SLAVE ADDRESS

71 1

SETUP OR

CONFIGURATION BYTE

SETUP OR

CONFIGURATION BYTE

P or Sr

MSB DETERMINES WHETHER

SETUP OR CONFIGURATION BYTE

SLAVE ADDRESS

71 1

SETUP OR

CONFIGURATION BYTE

P or Sr

MSB DETERMINES WHETHER

SETUP OR CONFIGURATION BYTE

A. ONE-BYTE WRITE CYCLE

NUMBER OF BITS

Figure 9. Write Cycle

BIT 7

(MSB)

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

(LSB)

REG

SEL2

SEL1

SEL0

CLK

BIP/UNI

RST

BIT

NAME

DESCRIPTION

REG

SEL2

SEL1

SEL0

Three bits select the reference voltage and the state of AIN_/REF

(MAX11606/MAX11607/MAX11610/MAX11611) or REF (MAX11608/MAX11609) (Table 6).

Defaulted to 000 at power-up.

CLK

1 = external clock, 0 = internal clock. Defaulted to 0 at power-up.

BIP/UNI

1 = bipolar, 0 = unipolar. Defaulted to 0 at power-up (see the Unipolar/Bipolar section).

RST

1 = no action, 0 = resets the configuration register to default. Setup register remains unchanged.

Don’t-care bit. This bit can be set to 1 or 0.

Table 1. Setup Byte Format

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